✔ 最佳答案
DDR個架構係咁...
如果要講要由SDRAM講起...(因為DDR RAM係SDRAM一種...)
最原始ge SDRAM係
[Cell Clock]=[I/O Bus Clock]=[Data transfers per second]
所謂Cell Clock即係Ram粒晶片ge時脈~
而I/O Bus Clock 就係Ram寬頻時脈...
Data transfers per second...應該唔需要解釋吧...
去到DDR SDRAM...比最原始SDRAM優勝ge地方係...
用左一種稱為Double Pumping...就係響時脈訊號上升同下降邊緣傳送資料...
咁樣就令1個I/O Bus Clock傳到2個Data...
亦所以你條DDR 266會出到133MHz~而DDR 400會出到200MHz...
因為佢show緊個I/O Bus clock...講埋個3200係咩黎...
3200就係Peak transfer Rate...以MHz做單位...
計法係用Data transfer per second乘64再/8...之後再round up~
[Cell Clock]乘二=[I/O Bus Clock]乘二=[Data transfers per second]
順手講埋DDR-2 SDRAM...
DDR-2係響DDR上面...將個電子介面設計改良...
令到Bus Clock=Cell Clock x 2...
[Cell Clock]乘四=[I/O Bus Clock]乘二=[Data transfers per second]
至於DDR-3 SDRAM...講一講條數就算...
[Cell Clock]乘八=[I/O Bus Clock]乘二=[Data transfers per second]